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Getting Started CSV Format Supported Hardware Firmware Integration

Supported Hardware

Luviner generates pure C code that runs on any microcontroller. Here are the tested and supported platforms.

Supported architectures

Architecture Examples Min Flash Min RAM Plan required
ARM Cortex-M4 STM32F4, nRF52840, SAM D51 32 KB 8 KB Explorer+
ARM Cortex-M7 STM32H7, i.MX RT1060 32 KB 8 KB Builder+
ESP32 ESP32, ESP32-S3, ESP32-C3 32 KB 8 KB Builder+
RISC-V ESP32-C3, GD32VF103, BL602 32 KB 8 KB Production+
ARM Cortex-M0/M0+ STM32L0, nRF52832, RP2040 16 KB 4 KB Production+
ARM Cortex-M33 STM32U5, nRF5340, LPC55S69 32 KB 8 KB Production+
Explorer plan supports ARM Cortex-M4 only (metrics and training). Builder adds ESP32 and Cortex-M7. Production+ unlocks all architectures.

Memory footprint

Luviner models are exceptionally compact thanks to proprietary quantization and architecture optimization:

Model complexityFlashRAMTypical use
Small 4 – 8 KB 1 – 2 KB Simple classification (3-5 classes, few features)
Medium 8 – 16 KB 2 – 4 KB Sensor fusion, activity recognition
Large 16 – 32 KB 4 – 8 KB Complex patterns, many classes, high accuracy

For comparison, a traditional MLP with equivalent accuracy requires ~6x more memory (~82 KB vs ~14 KB average).

Power consumption

Luviner models consume 30x less energy than traditional quantized networks during inference:

  • Single inference: < 0.05 mW on Cortex-M4 @ 48 MHz
  • Continuous monitoring (10 Hz): < 0.5 mW total
  • Always-on keyword spotting: < 1 mW

Toolchain requirements

To compile the exported library into your firmware, you need the standard toolchain for your target:

TargetToolchainCommand
ARM Cortex-M arm-none-eabi-gcc arm-none-eabi-gcc -mcpu=cortex-m4 ...
ESP32 ESP-IDF / Arduino idf.py build
RISC-V riscv32-unknown-elf-gcc riscv32-unknown-elf-gcc ...
Luviner's output is pure C with zero dependencies — no CMSIS, no RTOS, no math libraries. It compiles with any standard C compiler.
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